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Introduction - Digital Design Using FPGAs |
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Example 1 - Switch and LEDs |
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Example 2 - 2-Input Gates |
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Example 3 - Multiple-Input Gates |
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Example 4 - Equality Detector |
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Example 5 - 2-to-1 Multiplexer |
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Example 6 - Quad 2-to-1 Multiplexer |
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Example 7 - 4-to-1 Multiplexer |
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Example 8 - Clocks and Counters |
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Example 9 - 7-Segment Decoder |
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Example 10 - 7-Segment Displays: x7seg and x7segb |
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Example 11 - 2's Complement 4-Bit Saturator |
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Example 12 - Full Adder |
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Example 13 - 4-Bit Adder |
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Example 14 - N-Bit Adder |
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Example 15 - N-Bit Comparator |
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Example 16 - Edge-Triggered D Flip-Flop |
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Example 17 - D Flip-Flops in VHDL |
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Example 18 - Divide-by-2 Counter |
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Example 19 - Registers |
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Example 20 - N-Bit Register in VHDL |
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Example 21 - Shift Registers |
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Example 22 - Ring Counters |
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Example 23 - Johnson Counters |
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Example 24 - Debounce Pushbuttons |
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Example 25 - Clock Pulse |
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Example 26 - Arbitrary Waveform |
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Example 27 - Pulse-Width Modulation (PWM) |
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Example 28 - Controlling Position of a Servo |
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Example 29 - Scrolling the 7-Segment Display |
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Example 30 - Fibonacci Sequence |
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Appendix A - Aldec Active-HDL Tutorial |
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Part 1: Project Setup |
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Part 2: Design Entry - sw2led.bde |
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Part 3: Synthesis and Implementation |
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Part 4: Program FPGA Board |
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Part 5: Design Entry - gates2.bde |
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Part 6: Simulation |
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Part 7: Design Entry - HDE |
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Part 8: Simulation - gates2 |
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Appendix B - Number Systems |
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B.1 Counting in Binary and Hexadecimal |
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B.2 Positional Notation |
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B.3 Fractional Numbers |
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B.4 Number System Conversions |
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B.5 Negative Numbers |
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Appendix C - Basic Logic Gates |
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C.1 Truth Tables and Logic Equations |
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C.2 Positive and Negative Logic: De Morgan's Theorem |
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C.3 Sum of Products Design |
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C.4 roduct of Sums Design |
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Appendix D - Boolean Algebra and Logic Equations |
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D.1 Boolean Theorems |
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D.2 Karnaugh Maps |
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Appendix E - VHDL Quick Reference Guide |
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