Table of Contents - Learning By Example Using Verilog - Basic Digital Design With the BASYS FPGA Board

Learning by Example Using Verilog - Basic Digital Design With a BASYS FPGA Board

TABLE OF CONTENTS

1. Introduction to Digital Logic
	1.1 Background
	1.2 Digital Logic
	1.3 Verilog
2. Basic Logic Gates
	2.1 Truth Tables and Logic Equations
		The Three Basic Gates
		Four New Gates
	2.2 Positive and Negative Logic: De Morgan’s Theorem
	2.3 Sum of Products Design
	2.4 Product of Sums Design
		Verilog Examples
		Example 1 – 2-Input Gates
		Example 2 – Multiple Input Gates
	Problems
3. Boolean Algebra and Logic Equations
	3.1 Boolean Theorems
		One-Variable Theorems
		Two- and Three-Variable Theorems
	3.2 Karnaugh Maps
		Two-Variable K-Maps
	3.3 Computer Mimimization Techniques
		Tabular Representations
		Prime Implicants
		Essential Prime Implicants
		Verilog Examples
		Example 3 – Majority Circuit
		Example 4 – 2-Bit Comparator
	Problems
4. Implementing Digital Circuits
	4.2 Transistor-Transistor Logic (TTL)
	4.3 Programmable Logic Devices (PLDs and CPLDs)
	4.4 Field Programmable Gate Arrays (FPGAs)
		Verilog Examples
		Example 5 – Map Report
	Problems
5. Combinational Logic
	5.1 Multiplexers
		2-to-1 Multiplexer
		4-to-1 Multiplexer
		Quad 2-to-1 Multiplexer
		Verilog Examples
		Example 6 – 2-to-1 Multiplexer: if Statement
		Example 7 – 4-to-1 Multiplexer: Module Instantiation
		Example 8 – 4-to-1 Multiplexer: case Statement
		Example 9 – A Quad 2-to-1 Multiplexer
		Example 10 – Generic Multiplexer: Parameters
		Example 11 – Glitches
	5.2 7-Segment Displays
		Verilog Examples
		Example 12 – 7-Segment Decoder: Logic Equations
		Example 13 – 7-Segment Decoder: case Statement
		Example 14 – Multiplexing 7-Segment Displays
		Example 15 – 7-Segment Displays: x7seg and x7segb
	5.3 Comparators
		Cascading Comparators
		TTL Comparators
		Verilog Examples
		Example 16 – 4-Bit Comparator Using a Verilog Task
		Example 17 – N-Bit Comparator Using Relational Operators
	5.4 Decoders and Encoders
		Decoders
		TTL Decoders
		Encoders
		Priority Encoders
		TTL Encoders
		Verilog Examples
		Example 18 – 3-to-8 Decoder: Logic Equations
		Example 19 – 3-to-8 Decoder: for Loops
		Example 20 – 8-to-3 Encoder: Logic Equations
		Example 21 – 8-to-3 Encoder: for Loops
		Example 22 – 8-to-3 Priority Encoder
	5.5. Code Converters
		Binary-to-BCD Converters
		Shift and Add 3 Algorithm
		Gray Code Converters
		Verilog Examples
		Example 23 – 4-Bit Binary-to-BCD Converter: Logic Equations
		Example 24 – 8-Bit Binary-to-BCD Converter: for Loops
		Example 25 – 4-Bit Binary to Gray Code Converter
		Example 26 – 4-Bit Gray Code to Binary Converter
	Problems
6. Arithmetic Circuits
	6.1 Adders
		Half Adder
		Full Adder
		Carry and Overflow
		TTL Adder
		Verilog Examples
		Example 27 – 4-Bit Adder: Logic Equations
		Example 28 – 4-Bit Adder: Behavioral Statements
		Example 29 – N-Bit Adder: Behavioral Statements
	6.2 Subtractors
		Half Subtractor
		Full Subtractor
		An Adder/Subtractor Circuit
		Verilog Examples
		Example 30 – 4-Bit Adder/Subtractor: Logic Equations
		Example 31 – N-Bit Subtractor: Behavioral Statements
	6.3 Shifters
		Verilog Examples
		Example 32 – 4-Bit Shifter
	6.4 Multiplication
		Binary Multiplication
		Signed Multiplication
		Verilog Examples
		Example 33 – Multiplying by a Constant
		Example 34 – A 4-bit Multiplier
	6.5 Division
		Binary Division
		Verilog Examples
		Example 35 – An 8-bit Divider using a Task
	6.6 Arithmetic Logic Unit (ALU)
		Verilog Examples
		Example 36 – 4-Bit ALU
	Problems
7. Sequential Logic
	7.1 Latches and Flip-Flops
		SR Latch
		Clocked SR Latch
		D Latch
		Edge-Triggered D Flip-Flop
		Verilog Examples
		Example 37 – Edge-Triggered D Flip-Flop
		Example 38 – Edge-Triggered D Flip-Flop with Set and Clear
		Example 39 – D Flip-Flops in Verilog
		Example 40 – D Flip-Flop with Asynchronous Set and Clear
		Example 41 – Divide-by-2 Counter
	7.2 Registers
		Verilog Examples
		Example 42 – 1-Bit Register
		Example 43– 4-Bit Register
		Example 44 – N-Bit Register
	7.3 Shift Registers
		4-Bit Ring Counter
		Verilog Examples
		Example 45 – Shift Registers
		Example 46 – Ring Counter
		Example 47 – Debounce Pushbuttons
		Example 48 – Clock Pulse
	7.4 Counters
		Arbitrary Waveform
		Verilog Examples
		Example 49 – 3-Bit Counter
		Example 50 – Modulo-5 Counter
		Example 51 – N-Bit Counter
		Example 52 – Clock Divider: Modulo-10K Counter
		Example 53 – Arbitrary Waveform
	7.5 Pulse-Width Modulation (PWM)
		Controlling the Speed of a DC Motor using PWM
		Controlling the Position of a Servo using PWM
		Verilog Examples
		Example 54 – Pulse-Width Modulation (PWM)
		Example 55 – PWM Signal for Controlling Servos
	7.6 BASYS Board Examples
		Verilog Examples
		Example 56 – Loading Switch Data into a Register
		Example 57 – Shifting Data into a Shift Register
		Example 58 – Scrolling the 7-Segment Display
		Example 59 – Fibonacci Sequence
	Problems
8. State Machines
	8.1 Mealy and Moore State Machines
	8.2 A Moore Machine Sequence Detector
	8.3 Mealy Machine Sequence Detector
		Verilog Examples
		Example 60 – Sequence Detector
		Example 61 – Door Lock Code
	Problems
Appendix A – Aldec Active-HDL Tutorial
	Part 1: Project Setup
	Part 2: Design Entry
	Part 3: Simulation
	Part 4: Creating a Top-level Design
	Part 5: Synthesis and Implementation
	Part 6: Program BASYS Board
Appendix B – Number Systems
	B.1 Counting in Binary and Hexadecimal
	B.2 Positional Notation
	B.3 Fractional Numbers
	B.4 Number System Conversions
	B.4 Negative Numbers
Appendix C – Verilog Quick Reference Guide
Index

(262 pages)