| 1. Verilog Building Blocks |
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1.1 Modeling Digital Circuits Using Verilog |
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1.2 Verilog if Statement |
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Example 1 - 2-to-1 Multiplexer |
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Example 2 - Registers |
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Example 3 - Debounce Pushbuttons |
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Example 4 - Clock Pulse |
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Example 5 - Counters |
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Example 6 - Clock Divider |
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Example 7 - Comparators |
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1.3 Verilog case Statement |
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Example 8 - 4-to-1 Multiplexer |
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Example 9 - 7-Segment Decoder |
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Example 10 - Arithmetic Logic Unit (ALU) |
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1.4 Verilog for Loops |
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Example 11 - 4-Input Gates |
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Example 12 - Binary-to-BCD Converter |
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Example 13 - Gray Code Converters |
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Example 14 - Multiplier |
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Example 15 - Divider |
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Example 16 - 3-to-8 Decoder |
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1.5 State Machines |
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Example 17 - A Moore Machine Sequence Detector |
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Example 18 - A Mealy Machine Sequence Detector |
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Example 19 - Door Lock Code |
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Example 20 - Traffic Lights |
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1.6 Multiple-Module Verilog
Programs |
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Example 21 - The 7-Segment Display
Module, x7segb |
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1.7 Verilog while Statement |
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Example 22 - GCD Algorithm - Part 1 |
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Problems |
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| 2. Datapaths and Control Units |
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Example 23 - GCD Algorithm - Part 2 |
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Example 24 - An Integer Square Root Algorithm |
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| 3. Integrating the Datapath and Control Unit |
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Example 25 - GCD Algorithm - Part 3 |
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Example 26 - Integer Square Root - Part 2 |
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| 4. Memory |
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Example 27 - A Verilog ROM |
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Example 28 - Distributed RAM/ROM |
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Example 29 - A Stack |
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Example 30 - Block RAM |
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Example 31 - External RAM |
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Example 32 - External Flash Memory |
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| 5. UART |
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Example 33 - Transmit Module |
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Example 34 - Receive Module |
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| 6. VGA Controller |
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Example 35 - VGA Stripes |
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Example 36 - VGA PROM |
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Example 37 - Sprites in Block ROM |
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Example 38 - Screen Saver |
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Example 39 - External Video RAM |
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Example 40 - External Video Flash |
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| 7. PS/2 Port |
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Example 41 - Keyboard |
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Example 42 - Mouse |
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| 8. Graphics |
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Example 43 - Clearing the Screen |
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Example 44 - Plotting a Dot |
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Example 45 - Plotting a Line |
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Example 46 - Plotting a Star |
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Example 47 - Plotting a Circle |
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| 9. Forth Core for FPGAs |
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Example 48 - FC16 Forth Core |
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Example 49 - Data Stack |
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Example 50 - Function Unit |
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Example 51 - Return Stack |
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Example 52 - FC16 Controller |
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Example 53 - GCD Forth Program |
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Example 54 - Square Root Forth Program |
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| Appendix A – Aldec Active-HDL Tutorial - Simulations |
| Appendix B – Making a Turnkey System |
| Appendix C – Verilog Quick Reference Guide |
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