|  | Introduction - Digital Design Using FPGAs | 
            
            
              |  | Example 1 - Switch and LEDs | 
            
              |  | Example 2 - 2-Input Gates | 
            
              |  | Example 3 - Multiple-Input Gates | 
            
              |  | Example 4 - Equality Detector | 
            
              |  | Example 5 - 2-to-1 Multiplexer | 
            
              |  | Example 6 - Quad 2-to-1 Multiplexer | 
            
              |  | Example 7 - 4-to-1 Multiplexer | 
            
            
              |  | Example 8 - Clocks and Counters | 
            
              |  | Example 9 - 7-Segment Decoder | 
            
              |  | Example 10 - 7-Segment Displays: x7seg and x7segb | 
            
            
              |  | Example 11 - 2's Complement 4-Bit Saturator | 
            
              |  | Example 12 - Full Adder | 
            
              |  | Example 13 - 4-Bit Adder | 
            
              |  | Example 14 - N-Bit Adder | 
            
              |  | Example 15 - N-Bit Comparator | 
            
              |  | Example 16 - Edge-Triggered D Flip-Flop | 
            
            
              |  | Example 17 - D Flip-Flops in VHDL | 
            
              |  | Example 18 - Divide-by-2 Counter | 
            
              |  | Example 19 - Registers | 
            
              |  | Example 20 - N-Bit Register in VHDL | 
            
              |  | Example 21 - Shift Registers | 
            
            
              |  | Example 22 - Ring Counters | 
            
              |  | Example 23 - Johnson Counters | 
            
            
              |  | Example 24 - Debounce Pushbuttons | 
            
              |  | Example 25 - Clock Pulse | 
            
              |  | Example 26 - Arbitrary Waveform | 
            
              |  | Example 27 - Pulse-Width Modulation (PWM) | 
            
              |  | Example 28 - Controlling Position of a Servo | 
            
              |  | Example 29 - Scrolling the 7-Segment Display | 
            
              |  | Example 30 - Fibonacci Sequence | 
            
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              | Appendix A - Aldec Active-HDL Tutorial | 
            
              |  | Part 1: Project Setup | 
            
              |  | Part 2: Design Entry - sw2led.bde | 
            
              |  | Part 3: Synthesis and Implementation | 
            
              |  | Part 4: Program FPGA Board | 
            
              |  | Part 5: Design Entry - gates2.bde | 
            
              |  | Part 6: Simulation | 
            
              |  | Part 7: Design Entry - HDE | 
            
              |  | Part 8: Simulation - gates2 | 
            
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              | Appendix B - Number Systems | 
            
              |  | B.1 Counting in Binary and Hexadecimal | 
            
              |  | B.2 Positional Notation | 
            
              |  | B.3 Fractional Numbers | 
            
              |  | B.4 Number System Conversions | 
            
              |  | B.5 Negative Numbers | 
            
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              | Appendix C - Basic Logic Gates | 
            
              |  | C.1 Truth Tables and Logic Equations | 
            
              |  | C.2 Positive and Negative Logic: De Morgan's Theorem | 
            
              |  | C.3 Sum of Products Design | 
            
              |  | C.4 roduct of Sums Design | 
            
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              | Appendix D - Boolean Algebra and Logic Equations | 
            
              |  | D.1 Boolean Theorems | 
            
              |  | D.2 Karnaugh Maps | 
            
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              | Appendix E - VHDL Quick Reference Guide | 
            
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